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Power dissipation

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In doing some research for improving the CPU power consumption article (which is currently quite poor), I've come across several figures for the power consumption of various PDP-8 models. Anyone think this information would be interesting to include here, or an unneccessary aside? -- uberpenguin 16:51, 20 October 2005 (UTC)[reply]

It would probably be most interesting when set in the context of "MIPS per Watt" or some such. PDP-8s drew typical amounts of power for their time (seems to me that the PDP-8/E power supply was rated at about 20 or 25 amps of +5 plus a few other voltages to operate the serial lines and core memory) but you didn't get very much computation for your 125 watts, especially when compared to modern microprocessor chips!
Atlant 17:04, 31 October 2005 (UTC)[reply]

Bad memory?

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Sounds like a case of bad memory to me. But he did say "if i remember correctly" (or something like that). I guess he didn't... RTC 06:55 Nov 5, 2002 (UTC)

I have a problem with this article. There's a lot of technical language that is not explained. What is a "word of memory", for instance?


I've now defined what a word of memory is, and will go back and re-read the entire article as time permits. In the best Wikipedia fashion, everyone else, of course, is also welcome to pitch in!

Atlant 13:14, 6 Dec 2004 (UTC)


Another comment (I made the first observation, above). I recently took a course in Technical Communication, and would like to try and make this article more accessible to readers without a technical background. I'm going to detail the whole process in this discussion area, so editors know what I'm doing and why I'm doing it.

My intent is not to delete any information already present, but to break it down into chunks for more specific audiences. A high school student doing a report about the history of computing should find this article as useful as an antique computing enthusiast looking for an example of assembly code.

--JonBuck


JonBuck, I think that the Wikipedia tradition is that you don't need to convince any of us about why you're doing it as long as you're doing it right. None of us "own" the PDP-8 page, and we'll all appreciate attempts to improve it. (See Wikipedia:Be bold in updating pages.) And if you manage to put some technical fact askew, we'll all manage to get it fixed.

By the way, you can "sign" your name to talk pages by typing three tildes in succession (but with no intervening spaces): ~ ~ ~. Four tildes will sign your name and the current timestamp.

Atlant 13:55, 7 Dec 2004 (UTC)


Okay, I've re-read the article (and expanded on a few things), but I don't see where it needs a lot of jargon explained. Remember, the idea here is that we don't need to explain everything "in place" as long as everything is suitably hyper-linked to an explanation. For example, we don't need to explain core memory, just ensure that it's hyperlinked to an article that does explain it.

Obviously, you're free to disagree with me, but please read and edit the article with that in mind.

Atlant 18:00, 7 Dec 2004 (UTC)


As an old-timer, I'd like to point out that we always referred to a byte as half of a word, regardless of the word size. Thus, within the context of the PDP-8, maximum memory would be 32k words or 64k 6-bit bytes. Would anyone object to a minor change indicating 8-bit bytes for the 48k figure in the article? Grumpyoldgeek 23:05, 11 November 2005 (UTC)[reply]

——-

As another old-timer that used a PDP-8/L we certainly had 2 bytes per word. . There is a byte swap instruction in the instruction set. However, they weren’t always half words. When the 8080 chip came out, 8 bit bytes were the word size then, so for a while a byte and a word were the same thing on the 8080. When the 8086 came out with 16 bit words the universe became right again and two 8 bit bytes were one word in the 8080/8086 world. On the CDC 6400 which I used next in my life we had 15 and 30 bit instructions and also packed 10 6 bit characters in a word. So there we also didn’t talk much about bytes, since we used 6 bit, 15 bit, 30 bit entities and byte wouldn’t have made much sense. Historically, a byte is 6 or 8 bits for 12 bit and 16 bit word architectures. The usage of a byte as a smaller part of a word was endearing as a small bite of a word was called a byte. Kd4ttc (talk) 02:55, 13 November 2020 (UTC)[reply]

Example code looks wrong to me

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It's been a while (31 years, to be precise, so I'd like confirmation of this before I change it).

The code looks wrong to me. Specifically, the TAD (DATA-1).

The TAD instruction grabs the data AT the location specified. To get the address of the data being referenced, you'd need to grab data that references it directly. Doing a TAD (DATA-1) would appear, to me, to be getting the INSTRUCTION that happens to be just before the location tagged with "DATA" in the assembler code.

My proposed change:

HELLO,  CLA CLL         / Clear the AC and the Link bit
          TAD DADDR    

... ...

  DADDR, .
  DATA,  "H               / A well-known message
         "e               /

I'd like to know people's thoughts on this, but I'm pretty sure I'm right.
PKtm 15:24, 30 September 2005 (UTC)[reply]

I think you're forgetting one or two things:
1. The "(SYMB)" grammar in PAL-III builds an on-page "magic literal" that contains the value of the symbol contained in the parentheses, and
2. Indirect accesses from locations 10 through 17 pre-increment the memory location before using it as an address. So you want to preset it one location "earlier" than the data to be indirectly accessed.
The "TAD (STR-1)" style takes advantage of both of these things, building a magic literal that contains a datum (an address, really) that points one word before the "Hello, world!" string. But as in Perl, TMTOWTDI; your way using a cell containg the crrent location counter at the head of the string works as well.
Atlant 16:32, 30 September 2005 (UTC)[reply]


OK, fair enough, and thanks for the explanation. I remembered the autoincrement (that's a feature of the hardware), but not the "magic literal" feature of the assembler itself (not sure that this feature was even in PAL-D, which is what I remember using on my very minimalist 4K PDP-8/I)
It just seems to me that here on Wikipedia, dealing with the basics, we should avoid showing what is really just "syntactic sugar" (e.g., building a magic literal), because people who don't know (or, ahem, remember) that feature of the assembler itself (just software, that is) could get confused.
BTW, I'm a Perl coder now too. :)
PKtm 17:50, 1 October 2005 (UTC)[reply]


OK, and another thing... Now that I look at it more carefully, the point of the section on subroutines is lost, because the first "example program" already uses a subroutine. The section on subroutines, contrary to what it says, doesn't show the "hello world" example "rewritten to use a subroutine," but rather just uses a different looping construct (null-terminating the data, rather than using a counter).
PKtm 20:29, 2 October 2005 (UTC)[reply]
Okay, I fixed up the example to make it a lot simpler (and avoid any subroutine) although I did use a magic literal. Still, the example does claim to be written in PAL-III and not PAL-D. :-) But we could certainly go back to the cute "label, ." trick to avoid that if you like.
Atlant 17:18, 3 October 2005 (UTC)[reply]
Looks better, simpler, and has good progression. I also just changed it to all-caps in the first example, for consistency between the two examples, and also because we didn't (typically) even have lower-case way-back-then.
Personally, I think it's less confusing to avoid the magic literal, but I'll let you decide.
PKtm 04:22, 4 October 2005 (UTC)[reply]
Thanks for the up-casing. I prefer that for PAL but didn't want to change the original text (to that degree :-). With regard to the magic literal, I don't feel strongly about it either. We could let inertia rule or you could change back to your "label, ." structure and I certainly won't revert you. Or we could just explicitly declare a data cell and fill it with the value, doing the the same thing as either of the other two approaches. TMTOWTDI. :-)
Atlant 12:58, 4 October 2005 (UTC)[reply]

I found a few other suspicious-looking parts in the examples. DATAS -> DATA for one. Could some please review the code lines containing JMS I .*? bkil (talk) 23:41, 19 January 2008 (UTC)[reply]

Clock frequency

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Does anybody happen to know what a typical clock period for a PDP-8 as generated by one of the RC oscillator flip chips (like this one) was? I can't find any docs on this specific. -- uberpenguin 04:30, 15 October 2005 (UTC)[reply]

PDP-8s didn't have a "clock" in the exact sense that you think of them today. They had a "timing generator" that was crystal-controlled (at least on some models; it may have been a delay-line oscillator on the earlier models) but the end result of the timing generator was a series of "time states" and "time pulses" that varied depending on the exact machine operation that was to be performed. The speed of the cycle was intimately associated with the speed of the core memory system that was used in any particular generation of PDP-8.
For the PDP-8/E/F/M (the models I'm most familiar with), the timing generator (the M8330 module [1]) could generate two different cycles: a 1.2 us fast cycle and a 1.5 us slow cycle. The fast cycle was used for ordinary core memory accesses (where you were doing a read/restore or clear/write operation). The 1.5 us slow cycle was used when you were doing a read-modify-write core cycle (as you do with an ISZ instruction, when you access memory locations 10 through 17 as an indirect address, or when you're accessing the word-count or bus-address words for three-cycle data-break).
If we assume purely fast cycles, one could therefore loosely speak of a PDP-8 having a clock rate of 833 kHz, but we never spoke of them in those terms.
Atlant 01:10, 16 October 2005 (UTC)[reply]
Hmm.. So is it safe to say that the PDP-8s used, at least in part, asynchronous logic? Or did all the TTL just operate on whatever time cycle the core memory required for the operation? -- uberpenguin 01:29, 16 October 2005 (UTC)[reply]
The latter. Essentially, the timing generator executed a strict state machine that went through the various phases and time states as required by the instruction currently under execution (or the state of the "Data Break" I/O logic which time-shared the core memory with the CPU).
This is pretty similar to most modern microprocessors but much different than (say) the PDP-11, where the processor timing often was truly asynchronous, depending on external signals from the Unibus to advance through its processing.
Atlant 16:06, 20 October 2005 (UTC)[reply]
The PDP-8/I and 8/L had true asynchronous logic. There is no crystal oscillator to be found. Timing pulses and delays were achieved with tapped hardware delay lines such as the M360 module.
The PDP-8/E and 8/F used the above mentioned timing generator with a master crystal oscillator and the logic was syncronous. I can't speak authoritatively, but I believe the 8/s was async as well. Grumpyoldgeek 01:00, 12 November 2005 (UTC)[reply]
Well, it's been a long time since Earl Caine (sp?) trained me on the PDP-8/I, but I don't remember its timing being asynchronous in any way. Generating timing using (the moral equivalent of) a delay line oscillator isn't the same as being truly "asynchronous". As an example of a truly asynhronous design, many PDP-11s actually slipped their timing, nanosecond-by-nanosecond, based on the signals coming back from the I/O busses; I don't think the PDP-8/I/L did that. I think the CPU's timing generator was firmly in control of all machine timing. But as I say, it's a long time since I was trained or even cracked open the prints, so I could be wrong. (And with regard to the "Straight-8", I've been told that the 8/I was just a TTL implementation of essentially the exact same logic. And I'd assume that the 8/S used a similar (but more complex) timing generator.)
Atlant (talk) 15:41, 19 May 2008 (UTC)[reply]

Still operating?

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The second para of the Data General history section says that many PDP-8s still operate today. Is this still true? If so, it would be worthy of a mention in this article. If not, the DG article needs to change.-gadfium 21:12, 26 December 2005 (UTC)[reply]

Yes, there are indeed still PDP-8's in operation. There's one site where you can even operate a live one over the web via a Java interface. --72.35.146.211 15:54, 6 July 2006 (UTC)[reply]
And you can download several different PDP-8 compiler programs. They taught PDP-8 in a certain Australian University in 2005. Its still out there *spooky noise* glasnt<3 05:57, 21 July 2006 (UTC)[reply]
It would be more useful to say that pdp8s are still used for doing actual work instead of nostalgic tinkering. For the former, it's commonly believed that pdp8s are still being used in metalworking shops. I'd like to see solid proof of this. There is ample proof of the latter. Frotz661 20:18, 23 October 2006 (UTC)[reply]
I would challenge the PDP8 community out there to document 'useful working' PDP8s: I saw one, in 2003, touring an contract PCB manufacturing company in Massachusetts. It was in a working wire wrapping machine (I think it was a DITMICO?); since that time it has (sadly) been replaced. Calixte
22JAN2008 -- To further my challenge along (see above: finding useful working PDP8s out there) I will PayPal the 1st person that finds one: $25, the 2nd $20 and the third $15, fourth through tenth: $5. I will have to verify all claims prior to payments of course, but I will pay the finder fees since I will be writing a paying article about these working machines. Calixte
A search today on "pdp-8" at eBay shows one vendor http://stores.ebay.com/visicnc-automation-and-machines that is selling pdp-8 boards for high prices ($499), which suggests they thing there is still a market. They might be able to point you to active users. Apparently pdp-8's were used in Kearney & Trecker CNC controllers [2]. --agr (talk) 00:28, 23 April 2008 (UTC)[reply]

Still operating?

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Does anyone know the list price of the PDP-8 in 1965 dollars? How did the price change through the 1970's? (kradak (talk) 17:41, 13 May 2011 (UTC))[reply]

Optional "Extended Arithmetic Element" EAE

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I found this in Bell and Newell. Since I am an old guy I actually had to use a PDP-8 while in grad school (mid '70's). We were forced to use it in the same course that used Bell and Newell. All that is said in the article is true. You really did have to flip switches to input programs. And the little incandescent lights danced across the front panel; there you hoped to find your "output". A hundred students had to sign up in 15 minute slots to use the damn thing. It was a great day when we were allowed to use the tape reader.

MQ <0:11> is where to find/put the multiplier quotient

SC <0:4> is the Shift Counter

The instruction set of this beast:

mqa ; put MQ register contents into accumulator
sca ; put SC register contets into accumulator
mql ; put accumulator into MQ, clear accumulator
muy ; multiply
dvi ; divide
nmi ; normalize (without studying this more I can't tell exactly what this means)
shl ; shift left
shr ; shift right
lsr ; logical shift right

There are a few more specifics around the registers, overflow, logic etc. in Bell and Newell. wvbaileyWvbailey 18:24, 23 October 2006 (UTC)[reply]

auto incrementing memory locations

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Does anyone have information about PDP-8 auto incrementing memory locations? I remember them as an alternative to having an index register. jmcw 15:14, 9 July 2007 (UTC)[reply]

Yes. The memory locations (in contemporary jargon, these were called "registers", somewhat different from modern man's understanding of the term) 10 through 17 octal, ie 8 through 15 decimal, simply increment by one whenever they are adressed indirectly. This enables them to be used as counters.
for example
CLA; TAD 0010 would load the value in register 0010, whereas
CLA; TAD i 0010 would load the value pointed to by register 0010, and then add 1 onto the value in register 0010 so that the next time you do CLA; TAD i 0010 it points to the next register.
Sorry if my explanation isn't very clear . . . Wilsonsamm (talk) 15:16, 19 May 2008 (UTC)[reply]
Oh by the way does anyone know if this applies for zero-page addresses only, or for every page? I seem to remember the Harris chips differing slightly on this. Wilsonsamm (talk) 15:27, 19 May 2008 (UTC)[reply]
IIRC, only Page Zero (in each memory field) was susceptible to the auto-increment behavior.
Atlant (talk) 15:34, 19 May 2008 (UTC)[reply]
The Harris chip do indeed differ, but in a subtly different way. All memory referencing instructions have two "special" bits. One is the indirect bit, and one is the zero page bit. On the Harris chip, if your code executes in page zero, and indirectly reference the index registers, without setting the page zero bit, the memory locations will not be pre-incremented, even though you are referring to the autoindexing registers. I'd call it a bug, if you look at how all DEC PDP-8 CPUs did, but that's the long and short of it. Oh, and note that the registers pre-increment, not post... /bqt@softjar.se 178.83.31.218 (talk) 09:58, 31 October 2010 (UTC)[reply]

Removal of accumulator debate

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I removed the pair of sections debating the PDP-8's legacy in terms of accumulators. Accumulators have been around since the dawn of computing. See the 1947 quote in the accumulator article history section. ENIAC had 20 accumulators; the IBM 701 series had a single accumulator. The entire contents is unsourced WP:Original research (The one source given is a mirror of the Wikipedia Digital Equipment Corporation article!). --agr (talk) 11:37, 14 April 2008 (UTC)[reply]

Memory

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I have a question on the memory management unit (I forget its name ...) and interrupts. On the event of a interrupt, is the instruction field (is that what it's called? the x86 equivalent is the codesegment I suppose) set to zero so that the effective call is to location 0000 in field 0? Wilsonsamm (talk) 03:21, 22 November 2008 (UTC)[reply]

When an interrupt occurs the contents of PC are placed into location 0 and execution then starts at location 0001. So the jump is to location 1 with the return location stuffed into location 0000. This is how subroutines are called in general. On a JSR the return address is stuffed into the subroutine address and execution starts at the next address. When the ISR is done the interrupt on instruction ION is immediately followed by an indirect jump through location 0000, which resumes the program. The ION instruction delays enabling of the interrupt for 1 instruction cycle so that an interrupt that occurs during interrupt processing does not interfere with correct return out of the interrupt. Note that the ISR is responsible for identifying the interrupt source since there are no vectored interrupts on the PDP-8. Kd4ttc (talk) 04:39, 13 November 2020 (UTC)[reply]

I think there is an error in the Description section, mentioning that extended memory was only available in "PDP-8E and later verions". I worked with a PDP-8 in 1969 that had two banks of 4,096 words and had the front panel lights and switches, as well. This predated the PDP-8E. I would suppose the original PDP-8 had extended memory as an option

Well, we have a PDP-8/I here with 8K. So unless I'm dreaming, we have living proof sitting on the floor. :-) /bqt@softjar.se 178.83.31.218 (talk) 10:02, 31 October 2010 (UTC)[reply]

I added a "citation needed" markup at the end of the Virtualization section, not to dispute claims about the bulletproof way to deal with code between CIF and JMP/JMS I, but to elicit a useful reference. The timesharing OS TSS/8 would have had to deal with this issue iff it gave users more than 4k of memory, which it didn't. I'd love to hear which programs actually did this instruction emulation, and to see the emulator code. While relatively easy to emulate a PDP-8, it's hardly trivial. (--Tim McNerney (talk) 04:46, 11 February 2016 (UTC))[reply]

8/A extended memory

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The article is wrong in that it claims the new extended memory on the 8/A used the accumulator instead of instructions to address the memory fields. In reality, you still used the instructions. The CDF/CIF instructions were extended with two more bits, and slightly altered, in order to address up to 40(8) fields, instead of the 10(8) fields in the original design. /bqt@softjar.se 178.83.31.218 (talk) 10:02, 31 October 2010 (UTC)[reply]

BSW

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The BSW instruction needs to be corrected a little. BSW was first available on the 8/E, and is not available on earlier machines. The opcode is 7002 though (setting the rotate two bits, without setting any of the rotate direction bits, which previously was pointless). /bqt@softjar.se 178.83.31.218 (talk) 10:13, 31 October 2010 (UTC)[reply]

MBR and MAR in the register diagram?

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Did all PDP-8's have those two registers, or were they only in some implementations? Should the "register set" diagrams include non-architected, non-programmer-visible (even to the OS programmer) registers only present in some implementations? Guy Harris (talk) 05:52, 22 October 2013 (UTC)[reply]

Discussion of internal aspects of the PDP-8 should be outside the scope of the article. Certainly by the time of the microprogrammed/emulated PDP-8s, there were no such discrete registers and this argues against their inclusion in the diagram, which is not specific to models. But in the text, the current revision lists those two registers to make the point that their re-use at different points in the instruction cycle was a cost-reducing innovation of the early models. Spike-from-NH (talk) 13:55, 22 October 2013 (UTC)[reply]

FPGA

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Enthusiasts have created entire PDP-8s using single FPGA devices. makes it sound surprising that the PDP-8 would fit in an FPGA, but today the Cray-1 fits in an FPGA that isn't even the high-end FPGA family. Specifically, it fits in the Xilinx Spartan 3E-1600. (I have to actually try this out someday.) Gah4 (talk) 20:52, 19 September 2016 (UTC)[reply]

Some of this article seems to be past tense, I believe contradicting MOS:TENSE. The PDP-8 architecture still exists, and descriptions of it should be present tense. Many machines still exist, also reasonably described in present tense. Events, such as the introduction, sale, prices, or changes to the architecture should be past tense. JEH seems to disagree with me on this. Not that I am ever sure that all my changes are correct, but I believe that most are, and are going in the direction indicated in MOS:TENSE. I would appreciate specific comments on the reverted changes. Gah4 (talk) 21:03, 19 September 2016 (UTC)[reply]

Although the architecture still exists, designs and construction details of actual machines are discussing actions that occurred in the past. Jeh (talk) 21:06, 19 September 2016 (UTC)[reply]
I try to distinguish those, but maybe not perfectly. The Straight-8 still uses DTL, The 8S is still slower and smaller, though maybe not less expensive than the original 8. OK, the returned to is an event, though I might say using much less costly instead used. Are the last models still called "CMOS-8" (I haven't heard the term), and do they still use CMOS? Does the architecture still have a simple programmed I/O bus? Does the 8/S ALU still have 519 logic gates? Do the instructions still use auto increment registers? Does the 8/E still employ TTL? These are the questions I ask myself when editing. The architecture, a written document, likely still exists even if no actual implementations exist, though I suspect that enough do still exist. Yes, I try to keep the actions past, but it isn't always easy, and I am not perfect. Thanks for any more comments on this. @Jeh: Gah4 (talk) 21:32, 19 September 2016 (UTC)[reply]

By default, write all articles in the present tense, including for those covering products or works that have been discontinued. PDP-8/S serial 123 (most likely) was built by DEC years ago, and no longer exists. The long discontinued PDP-8/S is an implementation of the PDP-8 architecture that was designed and built by DEC. Yes, I try to get the actions, such as designed, built, planned, thought about, in the past tense. Details that don't have an action, the number of register for example, should be present, though the decision to build a 12 bit machine is past. Thanks all for helping get this right. Gah4 (talk) 00:19, 20 September 2016 (UTC)[reply]

I have reverted, as I believe most satisfy "By default, write all articles in the present tense, including for those covering products or works that have been discontinued." If someone believes that some edits don't satisfy that, please change just those. There is a limit to the size of the reason for edit box, so I couldn't say it all there. As above, I ask myself if the statement is still true, and write it present tense if it is. Note that many stay past, as that makes more sense. I will double check them myself. Thanks all. Gah4 (talk) 05:51, 20 September 2016 (UTC)[reply]

I have a question in for MOS on this, so I can get it right. Thanks for your patience. Gah4 (talk) 19:39, 20 September 2016 (UTC)[reply]
Presumably you mean "I have a question in for WP:MOS on this...". Guy Harris (talk) 20:11, 20 September 2016 (UTC)[reply]
The talk page that goes with MOS:TENSE. Should that page really be WP:MOS:TENSE? And what is the link for the talk page? Thanks. Gah4 (talk) 00:52, 21 September 2016 (UTC)[reply]
MOS is a disambiguation page, so it's clearly not what you want here; if you meant "I have a question in for the Manual of Style", you should have just said "MOS" without the link, as MOS doesn't go to the Wikipedia MOS (it points you to it, but that's different).
WP:MOS is the top-level page for the Wikipedia Manual of Style. MOS:TENSE is a redirect to the particular section of WP:MOS that discusses tense, so the talk page is the talk page for WP:MOS, i.e. Wikipedia talk:Manual of Style. Guy Harris (talk) 02:04, 21 September 2016 (UTC)[reply]
Thanks. I thought that there should be a shorter way to say Wikipedia talk:Manual of Style but I didn't know what it was. Maybe there isn't one. Gah4 (talk) 02:38, 21 September 2016 (UTC)[reply]
OK, it seems that WT:MOS is what I wanted. Gah4 (talk) 02:48, 21 September 2016 (UTC)[reply]

Inflation

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The inflation template seems to follow a consumer price index. I wonder (without stating one way of the other) if that is right for the PDP-8? Gah4 (talk) 02:08, 2 November 2016 (UTC)[reply]

The documentation for {{Inflation}} says

This template is only capable of inflating Consumer Price Index values: staples, workers' rent, small service bills (doctor's costs, train tickets). This template is incapable of inflating capital expenses, government expenses, or the personal wealth and expenditure of the rich. Incorrect use of this template would constitute original research. If you yourself do not have economic training, then please consult someone who does before using this template.

so, yes, it it appears that 1) it follows the country's consumer price index and 2) if a PDP-8 would be considered a capital expense, it might not be right for the PDP-8. Guy Harris (talk) 02:35, 2 November 2016 (UTC)[reply]

Personally, I think that the PDP-8 should be considered a personal computer. (Only one person normally uses it at a time.) I am not sure where we are supposed to find someone with economic and computer training. Gah4 (talk) 03:53, 2 November 2016 (UTC)[reply]

I consider the cautions for the template to be CYA in nature. The article is improved by providing a guide for what an old price now roughly means. However, to straddle the possibility of reduced non-applicability, it would be good to reduce the number of significant digits to 2 so, for example, $139,500 would be displayed as $140,000. —EncMstr (talk) 04:53, 2 November 2016 (UTC)[reply]
I think that it's better to reduce the after-inflation price to the original price decimal place - example (for 2017):
US$18,500 in 1965, equivalent to about $143,897.571 in 2017
  • 2 s.f. - equivalent to about $140,000 in 2017 - difference: 3663.147 (error: 2.55%)
  • to d.p. - equivalent to about $143,900 in 2017 - difference: 36.853 (error: 0.0257%)
--89.25.210.104 (talk) 16:23, 22 April 2018 (UTC)[reply]
The PDP-8 was a personal computer—but persons did not buy it; businesses, institutions, and laboratories bought it.
However, suppose we had a Computer Price Index, one that was defined as a basket of computers and documented the collapse in computer prices. Then the article might read, "priced at $18,500 (equivalent to about $50 in 2017)."—and the actual computing you bought then for $18,500 is only a fraction of the computing you would get in a $50 cellphone today. No, what we want is the Consumer Price Index; the PDP-8 is not a consumer good, but the point being made is the high price of a PDP-8, which might instead be spent on consumer goods, and to adjust the original price of a PDP-8 to reflect what has happened to the dollar in those decades. "How much was $18,500—in apples?" Spike-from-NH (talk) 04:20, 18 November 2018 (UTC)[reply]

The "Small Computer Handbook" didn't just cover the PDP-8/S

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The 1967 DEC Small Computer Handbook dealt with the PDP-8 as well as the PDP-8/S; it doesn't suggest, anywhere that I can see, that the "S" in "PDP-8/S" stands for "small", and, as it includes the PDP-8 non-/S, it indicates that the PDP-8 non/S is also a "small" computer. Guy Harris (talk) 08:02, 16 November 2018 (UTC)[reply]

Your point is persuasive and "serial" is more credible than "small." However, given that our sources do not extend to the debate in DEC marketing committees, deleting the note entirely was wise. Spike-from-NH (talk) 04:22, 18 November 2018 (UTC)[reply]
Definitely - this comment was intended to respond to Pi314m's edits, which, from the edit comments, appear to have been based on the false assumption that, because the Small Computer Handbook discussed the PDP-8/S, the "S" must stand for "Small".
I think I once saw something from DEC that indicated that it stood for "Serial", but without having that on hand as a reference, there's no reason to claim it stands for "Serial". Guy Harris (talk) 20:49, 18 November 2018 (UTC)[reply]
I used one, reluctantly, around 1969. The S stood for serial, but our joke was that it stood for slow. It usually could not keep up with the high-speed (300 characters per second) paper tape reader. We all preferred to get time on the PDP-8 instead. I guess this is all "original research" and thus cannot be in the article, but at the time it was merely common knowledge among those in the trenches. The 8/S was, so I heard, the first computer to sell for less than $10,000. Snezzy (talk)
"The 8/S also reduced the number of logic gates by using a serial, single-bit-wide data path to do arithmetic." Doing additions one bit at a time explains both Serial and Slow. But we continue to have little basis for asserting in the article what the S "stands for." (Imagine, I did not have to wait "to get time on" this multitasking graphics workstation with worldwide interconnection, or even drive in to the office!) Spike-from-NH (talk) 12:58, 29 January 2019 (UTC)[reply]

Poor quality code

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The code examples are of exceptionally poor quality, as are the subjective, and misguided, remarks about the supposed limitations of the -8. The code for PUSH and POP is extremely poor, and not representative of how one programs the -8. This is an ideal case for the auto-increment registers; one does not do the sort of AC hacking illustrated here. Moreover, it is quite typical to exploit field boundaries and wrap-arounds when dealing with issues such as overflow, which is not even checked in the illustrated code. Furthermore, it is a small matter to implement PDP-10-style PUSHJ/POPJ for recursive subroutines, and it is false that JMS leads to the kinds of bugs alleged here. The remark about a "skip chain" is telling: no competent -8 programmer would ever use a skip chain for processing interrupts. Instead one uses a "jump chain", which employs no SKP instructions at all. I believe it was either The Small Computer Handbook or Introduction to Programming that illustrated the "skip chain" method, and perhaps the remark is taken from there. Robert Harper (talk) 02:32, 6 May 2021 (UTC)[reply]

The PDP-8's only conditionals function by skipping the next instruction. I agree that the next instruction would be JMP. The result is known as a "skip chain", not a "jump chain". Indeed, it would contain no (unconditional) SKPs.
The examples are adequate as examples, though not optimal for actual use, such as in not checking for stack overflow.
Though it is possible to implement recursivity, for most of the PDP-8's history, including in many DEC products, available memory was limited, developers did not do so but used JMS straight, and they dealt with the bugs the article describes. It was not an issue of competence. Spike-from-NH (talk) 13:48, 9 May 2021 (UTC)[reply]

First, I am an expert on the PDP-8; I used to make my living programming it. I am not incorrect about any technical point.

You describe a "skip chain", which is not used in any serious code. In. "jump chain", ie "jmp chain," there are NO wasteful SKP instructions. You write, "TSF; JMP NOTTTY; KSF; JMP NOTKBD; Etc", rather than the idiotic "TSF; SKP; JMP ITSTTY; KSF; SKP; JMP ITSKBD; Etc". Look at Richard Lary's "Toy", which turned into RTS-8, if you want to learn how to write -8 code.

Second, there is a standard package for PUSHJ/POPJ, whose coding is elegant, unlike what is suggested here as exemplary (and then blamed on the -8 throughout). There has never been a bug in any serious code caused by someone thinking that JMS supports recursion, which it did not and should not do. After all, the -8 was the first RISC, and, unfortunately for them, DEC killed itself by scrapping that and thinking that the idea of a computer is to be a high-level programming language, a CISC, of which the VAX became the laughing stock example. — Preceding unsigned comment added by RobertWHarper (talkcontribs) 14:19, 9 May 2021 (UTC)[reply]

It is not "idiotic" to use SKP if the conditional skips on the opposite condition than the one you are interested in. The interrupt service code would be in Page 0 and it might be useful to avoid SKP instructions. But it would not be useful to write handlers for NOTTTY and so on, as the handlers (which would certainly not be in Page 0) need control on finding that it is their device, not that it isn't. So your recommended coding (if entirely in-line, as you imply) has defective logic.
No PDP-8 programmer believes that JMS supports recursion. The problem is that many used JMS and were not rigorous about what calls what, writing "serious code" as though JMS did support recursion, the source of those inscrutable bugs. Spike-from-NH (talk) 20:45, 9 May 2021 (UTC)[reply]